This invention relates generally to an expandable modular control system incorporating multiprocessing systems comprising a plurality of autonomous microprocessor modules linked by a system bus to a common external memory and more particularly to a bus assigner for assigning use of the system bus on a priority basis to the microprocessor having the highest priority or, alternatively, on a sequential basis to the several microprocessors as the bus assigner scans the microprocessors for a request for access to the external memory.
Reference may be made to the following U.S. Pat. Nos. 3,629,854; 3,641,505; 3,648,252; and 3,680,058.
Electronic data processing systems are utilized for a wide variety of different data processing activities, each of these activities having different systems requirements. Therefore, large amounts of storage, processing and input/output capabilities are generally required in real time control systems. Accordingly, multiprocessing systems wherein each of the several central processing units (CPUs) comprising the system shares a common memory and peripheral input/output devices with the other CPUs have been devised to more economically meet these requirements.
In these prior art multiprocessing systems, however, one CPU generally functions as a "master" processor for processing a master control program to, in turn, control the operations of the other "slave" processing units. In such an arrangement, the master CPU performs all executive functions while the remaining processors serve as peripheral extensions of the master processor unit. This arrangement, however, requires large amounts of time and memory capacity to keep all of the multiprocessing activities coordinated.
Moreover, it has become increasingly desirable to provide modular multiprocessing systems comprising a plurality of processing modules whereby the system can be expanded merely by adding additional modules. If the system is to be truly modular, however, the hardware implementation of each processor module should be identical so that each processor is capable of functioning independently of the other processors and not subject to the control of a master processor.
With the recent development of "CPU-on-a-chip" devices, or microprocessors, as they are more commonly known, employing primarily software (programming) rather than hardware (wired logic circuitry) in processing data, a new generation of data processing systems has evolved. One such system, used in monitoring telephone circuitry, is disclosed in the copending U.S. pat. application, Ser. No. 474,570 of J. G. Valassis, J. R. Holden and M. A. Mehta filed May 30, 1974, entitled "Modular Control System Designed With Microprocessors" and assigned to the assignee of the present invention. The microprocessor module disclosed therein is readily adaptable to a multiprocessing arrangement employing a plurality of such microprocessor modules linked to a common external memory.
However, some means for coordinating access to the external memory and other peripheral devices by the various microprocessors must be provided to facilitate the efficient operation of the multiprocessing arrangement.